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Cache-Oblivious Model

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Encyclopedia of Algorithms

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Footnote 1

Years and Authors of Summarized Original Work

1999; Frigo, Leiserson, Prokop, Ramachandran

Problem Definition

The memory system of contemporary computers consists of a hierarchy of memory levels, with each level acting as a cache for the next; a typical hierarchy consists of registers, level 1 cache, level 2 cache, level 3 cache, main memory, and disk (Fig.  1). One characteristics of the hierarchy is that the memory levels get larger and slower the further they get from the processor, with the access time increasing most dramatically between RAM memory and disk. Another characteristics is that data is moved between levels in blocks of consecutive elements.

As a consequence of the differences in access time between the levels, the cost of a memory access depends highly on what is the current lowest memory level holding the element accessed. Hence, the memory access pattern of an algorithm has a major influence on its practical running time. Unfortunately, the RAM model (Fig....

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Notes

  1. 1.

    Research supported by Danish Council for Independent Research, Natural Sciences.

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Authors and Affiliations

  1. Department of Mathematics and Computer Science, University of Southern Denmark, Odense, Denmark

    Rolf Fagerberg

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  1. Rolf Fagerberg
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Correspondence to Rolf Fagerberg .

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  1. Dept. Electrical Engineering & Computer Science, Northwestern University, Evanston, Illinois, USA

    Ming-Yang Kao

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Fagerberg, R. (2015). Cache-Oblivious Model. In: Kao, MY. (eds) Encyclopedia of Algorithms. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-27848-8_62-2

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  • DOI: https://doi.org/10.1007/978-3-642-27848-8_62-2

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