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Device-Level Modeling and Synthesis of High-Performance Pipeline ADCs

  • Book
  • © 2011

Overview

Authors:
  1. Jesús Ruiz-Amaya

    1. Instituto de Microelectrónica de Sevilla, Sevilla, Spain

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  2. Manuel Delgado-Restituto

    1. Instituto de Microelectrónica de Sevilla, Sevilla, Spain

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  3. Ángel Rodríguez-Vázquez

    1. Universidad de Sevilla and CSIC, Instituto de Microelectrónica de Sevilla, Sevilla, Spain

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  • Describes efficient procedures for hierarchical top-down design of pipeline converters
  • Presents new methodologies to reduce bottom-up iterations, through inherent embedding of transistor-level parameters, such as parasitic capacitances, transconductances, and saturation currents
  • Provides mathematical details of behavioral models, includes descriptions of the synthesis methods and associated tools and illustrates models through case studies supported by silicon prototypes
  • Includes supplementary material: sn.pub/extras

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Table of contents (7 chapters)

  1. Front Matter

    Pages 1-1
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  2. Pipeline ADC Overview

    • Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
    Pages 1-28

  3. Design Methodologies for Pipeline ADCs

    • Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
    Pages 29-37

  4. Pipeline ADC Electrical-Level Synthesis Tool

    • Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
    Pages 39-64

  5. Behavioural Modelling of Pipeline ADCs

    • Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
    Pages 65-103

  6. Case Study: Design of a 10bit@60MS Pipeline ADC

    • Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
    Pages 105-170

  7. Experimental Results and State of the Art

    • Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
    Pages 171-183

  8. Conclusions and Future Lines of Research

    • Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
    Pages 185-187

  9. Back Matter

    Pages 186-186
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Keywords

About this book

This book presents models and procedures to design pipeline analog-to-digital converters, compensating for device inaccuracies, so that high-performance specs can be met within short design cycles. These models are capable of capturing and predicting the behavior of pipeline data converters within less than half-a-bit deviation, versus transistor-level simulations. As a result, far fewer model iterations are required across the design cycle. Models described in this book accurately predict transient behaviors, which are key to the performance of discrete-time systems and hence to the performance of pipeline data converters.

Authors and Affiliations

  • Instituto de Microelectrónica de Sevilla, Sevilla, Spain

    Jesús Ruiz-Amaya, Manuel Delgado-Restituto

  • Universidad de Sevilla and CSIC, Instituto de Microelectrónica de Sevilla, Sevilla, Spain

    Ángel Rodríguez-Vázquez

Bibliographic Information

  • Book Title: Device-Level Modeling and Synthesis of High-Performance Pipeline ADCs

  • Authors: Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez

  • DOI: https://doi.org/10.1007/978-1-4419-8846-1

  • Publisher: Springer New York, NY

  • eBook Packages: Engineering, Engineering (R0)

  • Copyright Information: Springer Science+Business Media, LLC 2011

  • Hardcover ISBN: 978-1-4419-8845-4

  • Softcover ISBN: 978-1-4899-9318-2

  • eBook ISBN: 978-1-4419-8846-1

  • Edition Number: 1

  • Number of Pages: XIII, 209

  • Topics: Circuits and Systems, Signal, Image and Speech Processing, Processor Architectures

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