Transmitter leakage cancellation technique for CMOS SAW-less radio front-ends Maryamsadat ShokrekhodaeiAminghasem SafarianMojtaba Atarodi OriginalPaper 25 October 2017 Pages: 383 - 394
Impulse response analysis of carrier-modulated multiband RF-interconnect (MRFI) Yanghyo KimWei-Han ChoMau-Chung Frank Chang OriginalPaper 09 October 2017 Pages: 395 - 413
A subthreshold low-power CMOS LC-VCO with high immunity to PVT variations Imen GhorbelFayrouz HaddadMourad Loulou OriginalPaper 30 September 2017 Pages: 415 - 426
Correction to: A subthreshold low-power CMOS LC-VCO with high immunity to PVT variations Imen GhorbelFayrouz HaddadMourad Loulou Author Correction 25 October 2017 Pages: 427 - 427
Making use of semiconductor manufacturing process variations: FinFET-based physical unclonable functions for efficient security integration in the IoT Venkata P. YanambakaSaraju P. MohantyElias Kougianos OriginalPaper 07 October 2017 Pages: 429 - 441
A fast training method for memristor crossbar based multi-layer neural networks Raqibul HasanTarek M. TahaChris Yakopcic OriginalPaper 05 October 2017 Pages: 443 - 454
Performance and simulation accuracy evaluation of analog circuits with enclosed layout transistors Guilherme S. CardosoTiago R. Balen OriginalPaper 30 September 2017 Pages: 455 - 466
Analysis of effect of feedback current variation in CT Delta-Sigma modulators with Gm-C integrators Hua Tang OriginalPaper 06 October 2017 Pages: 467 - 476
Parametric fault detection of analog circuits based on Bhattacharyya measure Supriyo SrimaniManas Kumar ParaiHafizur Rahaman OriginalPaper 10 October 2017 Pages: 477 - 488
Design and analysis of high Transconductance Current Follower Transconductance Amplifier (CFTA) and its applications Shweta KumariManeesha Gupta Mixed Signal Letter 01 September 2017 Pages: 489 - 506
Design and analysis of a high speed double-tail comparator with isomorphic latch-preamplifier pairs and tail bootstrapping S. RahmaniM. B. Ghaznavi-Ghoushchi Mixed Signal Letter 03 October 2017 Pages: 507 - 521
Ultra low power beta multiplier-based current reference circuit Shailesh Singh ChouhanKari Halonen Mixed Signal Letter 10 October 2017 Pages: 523 - 529
Design of low leakage process tolerant SRAM cell D. AnithaK. ManjunathachariG. Prasad Mixed Signal Letter 23 October 2017 Pages: 531 - 538