Cost-effective smart power CMOS/DMOS technology: design methodology for latch-up immunity M. BafleurM. Puig VidalG. Sarrabayrouse OriginalPaper Pages: 219 - 231
Cost-effective smart power CMOS/DMOS technology: design of main driving and protection functions M. BafleurPh. GivelinTh. Laopoulos OriginalPaper Pages: 233 - 246
An analogue vector matching architecture S. CollinsD. R. BrownG. F. Marshall OriginalPaper Pages: 247 - 257
Synergy at work between continuous-time and sampled-data analog filters for integrated high-frequency, high-Q signal processing J. E. FrancaR. Schaumann OriginalPaper Pages: 259 - 276
Current mode biquadratic filter realizations employing operational amplifiers Muhammad Taher Abuelma'atti OriginalPaper Pages: 277 - 282