Volume 8, Issue 3 | Analog Integrated Circuits and Signal Processing

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Volume 8, Issue 3

November 1995

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6 articles in this issue

Cost-effective smart power CMOS/DMOS technology: design methodology for latch-up immunity
M. Bafleur
M. Puig Vidal
G. Sarrabayrouse
OriginalPaper Pages: 219 - 231
Cost-effective smart power CMOS/DMOS technology: design of main driving and protection functions
M. Bafleur
Ph. Givelin
Th. Laopoulos
OriginalPaper Pages: 233 - 246
An analogue vector matching architecture
S. Collins
D. R. Brown
G. F. Marshall
OriginalPaper Pages: 247 - 257
Synergy at work between continuous-time and sampled-data analog filters for integrated high-frequency, high-Q signal processing
J. E. Franca
R. Schaumann
OriginalPaper Pages: 259 - 276
Current mode biquadratic filter realizations employing operational amplifiers
Muhammad Taher Abuelma'atti
OriginalPaper Pages: 277 - 282
Call for papers

Announcement Pages: 285 - 290