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Back Bias Induced Modeling of Subthreshold Characteristics of SOI Junctionless Field Effect Transistor (JLFET)

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Abstract

In the present article, the modeling of subthreshold current of asymmetric silicon-on-insulator (SOI) Junctionless Field Effect Transistors (JLFETs) is done. The switching properties are further investigated by formulating the subthreshold swing characteristics based on the minimum potential concept. The model adopts the effect of substrate-induced surface potential (SISP) effect as well as source/drain depletion region with necessary changes in the boundary conditions at the silicon-buried oxide (BOX) interface. The developed model is beneficial for the optimization of low power switching characteristics for SOI JLFETs. The model results are validated with the numerical simulation results obtained from Sentaurus TCAD simulator.

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Authors and Affiliations

  1. Department of Electronics Engineering, Rajasthan Technical University, 324 010, Kota, India

    Vijay Kumar Dixit & Rajeev Gupta

  2. Department of Electrical Engineering, Indian Institute of Technology Patna, Bihta, Bihar, 801106, India

    P S T N Srinivas

  3. Department of Physics, L.N.D. College, Motihari (A Constituent Unit of B.R.A. Bihar University), Muzaffarpur, India

    Sarvesh Dubey

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  1. Vijay Kumar Dixit
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  2. Rajeev Gupta
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  3. P S T N Srinivas
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  4. Sarvesh Dubey
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Correspondence to Sarvesh Dubey.

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Dixit, V.K., Gupta, R., Srinivas, P.S.T.N. et al. Back Bias Induced Modeling of Subthreshold Characteristics of SOI Junctionless Field Effect Transistor (JLFET). Silicon 13, 1961–1967 (2021). https://doi.org/10.1007/s12633-020-00590-3

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  • DOI: https://doi.org/10.1007/s12633-020-00590-3

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