Abstract
This paper deals with negative differential resistance and its application to construction of threshold gates. We present evaluation of two synthesis algorithms for Generalised Threshold Gates and formulate properties and general steps of synthesis for Multi Threshold Threshold Gates.
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References
ITRS: Emerging research devices. Technical report, International Technology Roadmap for Semiconductors (2009)
Berezowski, K.S.: Compact binary logic circuits design using negative differential resistance devices. Electronics Letters 42(16), 5–6 (2006)
Bawiec, M.A., Nikodem, M.: Boolean logic function synthesis for generalised threshold gate circuits. In: 46th Design Automation Conference, pp. 83–86. ACM, New York (2009)
Bawiec, M., Nikodem, M.: Generalised threshold gate synthesis based on AND/OR/NOT representation of boolean function. In: 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 861–866 (January 2010)
Pettenghi, H., Avedillo, M.J., Quintana, J.M.: Using multi-threshold threshold gates in RTD-based logic design: A case study. Microelectron. J. 39(2), 241–247 (2008)
Pettenghi, H., Avedillo, M., Quintana, J.: Improved Nanopipelined RTD Adders using Generalized Threshold Gates. IEEE Transactions on Nanotechnology 10(1), 155–162 (2009)
Bergman, J., Chang, J., Joo, Y., Matinpour, B., Laskar, J., Jokerst, N., Brooke, M., Brar, B., Beam, E.: RTD/CMOS nanoelectronic circuits: thin-film InP-based resonant tunneling diodes integrated with CMOS circuits. IEEE Electron Device Letters 20(3), 119–122 (1999)
Haring, D.R.: Multi-threshold threshold elements. IEEE Transactions on Electronic Computers EC-15(1), 45–65 (1966)
Pacha, C., Auer, U., Burwick, C., Glosekotter, P., Brennemann, A., Prost, W., Tegude, F.-J., Goser, K.F.: Threshold logic circuit design of parallel adders using resonant tunneling devices. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 8(5), 558–572 (2000)
Subirats, J., Jerez, J., Franco, L.: A new decomposition algorithm for threshold synthesis and generalization of boolean functions. IEEE Transactions on Circuits and Systems I: Regular Papers 55(10), 3188–3196 (2008)
Gowda, T., Vrudhula, S., Kulkarni, N., Berezowski, K.: Identification of threshold functions and synthesis of threshold networks. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 30(5), 665–677 (2011)
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Bawiec, M.A., Wojciechowski, B., Nikodem, M., Biernat, J. (2012). Synthesis of Logic Circuits Based on Negative Differential Resistance Property. In: Moreno-Díaz, R., Pichler, F., Quesada-Arencibia, A. (eds) Computer Aided Systems Theory – EUROCAST 2011. EUROCAST 2011. Lecture Notes in Computer Science, vol 6927. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-27549-4_65
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DOI: https://doi.org/10.1007/978-3-642-27549-4_65
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-27548-7
Online ISBN: 978-3-642-27549-4
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