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High-level algorithm and architecture transformations for DSP synthesis

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Abstract

This survey paper reviews numerous high-level transformation techniques which can be applied at the algorithm or the architecture level to improve the performance of digital signal and image processing architectures and circuits implemented using VLSI technology. Successful design of VLSI signal and image processors requires careful selection of algorithms, architectures, implementation styles, and synthesis techniques. High-level transformations can play an important role in reducing silicon area or power at the same speed or in increasing the speed for same area. These transformations can also increase the suitability of an algorithm for a particular architectural style. The transformation techniques reviewed in this paper include pipelining, parallel processing, retiming, unfolding, folding, look-ahead, relaxed look-ahead, associativity, distributivity, and reduction in strength.

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  1. Department of Electrical Engineering, University of Minnesota, 55455, Minneapolis, MN

    Keshab K. Parhi

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Parhi, K.K. High-level algorithm and architecture transformations for DSP synthesis. Journal of VLSI Signal Processing 9, 121–143 (1995). https://doi.org/10.1007/BF02406474

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