Physical Limits For Scaling of Electronic Devices in Integrated Circuits

Abstract

In the paper physical limits for scaling of electronic devices in integrated circuits are discussed. The quantization of both electrical and thermal conductance in nanostructures is considered and estimated numerically. Problems of heat exchange in nanostructures, spread of doping atoms in a semiconductor material, a loss of electrostatic control of the current in a MOSFET, and electrons tunneling between a source and a drain inside a MOSFET are also discussed in the paper.