GaAs Device Reliability: High Electron Mobility Transistors and Heterojunction Bipolar Transistors

Abstract

The two main GaAs-based electronic device technologies are high electron mobility transistors (HEMTs) and heterojunction bipolar transistors (HBTs). Both technologies are commercialized for use in low-noise amplifiers, radar, and fiber optic data transmission systems. In this chapter, we will summarize the degradation mechanisms that limit the lifetime of these devices. A variety of contact and surface degradation mechanisms have been reported but differ in the two device technologies – for HEMTs, the layers are thin and relatively lightly doped compared to HBT structures, and there is a metal Schottky gate that is directly on the semiconductor. By contrast, the HBT relies on pn junctions for current modulation and has only ohmic contacts. This leads to different degradation mechanisms for the two types of devices.

Appendix– Glossary of Terms in Reliability Studies

THB :

Temperature-humidity-bias. A standard set of conditions defined under Electronics Industry Alliance/JES D22-A101-B. 85°C/85% rel. humidity

HAST :

Highly accelerated stress test. A standard set of conditions defined under EIA JES D22-A110B. 110/130°C/85% rel. humidity

Burn-in test :

An initial stress at high current or temperature often found to weed out defective parts and stabilize devices for further test

TLM :

Transmission line pattern used for extracting contact resistance – provides larger area for material analysis. Lateral fields present, vertical fields absent, may be used to identify degradation mechanism in limited cases

SEC :

Standard evaluation circuitry

MTTF :

Median or mean-time-to-failure (time required for 50% population to fail)

ESD/EOS :

Electrostatic discharge/electrical over-stress. ESD occurs when there is a difference in electrostatic potential between two charged objects; an exchange of electrostatic energy occurs causing their potentials to become balanced. EOS is the term for stress that exceeds the rated V/I and occurs when this exceeds the values guaranteed by the IC

HBM :

Human body model. Modeling of a situation where energy from an external electrical power or electrostatic energy source becomes charged within the human body to become discharged as electrostatic energy

MM :

Machine model. Modeling of a situation where electrostatic energy is charged within the machine through a grounding problem or other negative influence

DIR :

Design-in reliability

PLR :

Package level reliability

SPC :

Statistical process control using statistical techniques to measure and analyze the variation in processes. Most often used for manufacturing processes, the intent of SPC is to monitor product quality and maintain processes to fixed targets

EFR :

Early failure rate

HTOL :

High temperature operating life

HTRB :

High temperature reverse bias

HFGC :

High forward gate current

Corrosion :

Metal degradation due to chemical or electrolytic reactions in presence of moisture, contaminants, or bias

Electromigration :

Movement of metal atoms of a metal line in the direction of the current flow through that line. Metal atoms are removed from the starting end of the metal line and accumulate at the other end, forming voids at the entrance and hillocks at the exit of the line. Electromigration can result in open circuits (due to the voids) or line-to-line short circuits (due to the hillocks). Accelerated by temperature and current density and is modeled with t _f  = CJ-ne^(Ea/kT)

Kink :

Abrupt increase in drain current of HEMTs at a certain gate voltage, usually followed by a rapid increase in output conductance. A low-frequency phenomenon related to trapping effects

Gate sinking :

Reaction of HEMT gate metal with semiconductor at elevated temperatures

COTS :

Commercial-off-the-shelf

TDDB :

Time-dependent dielectric breakdown charge injection mechanism, leading to destruction of dielectric layers over time. During the buildup stage, charges invariably get trapped in various parts of the oxide as current flows in the oxide. The trapped charges increase in number with time, forming high electric fields (electric field = voltage/oxide thickness) and high-current regions along the way. This process of electric field buildup continues until the runaway stage is reached. During the runaway stage, the sum of the electric field built up by charge injection and the electric fields applied to the device exceeds the dielectric breakdown threshold in some of the weakest points of the dielectric

Gate lag :

A delayed response of the channel current to modulation of the gate potential. Results from traps on semiconductor surface near the gate

Hot carrier effects :

Phenomenon involving the injection of highly energetic carriers into the gate oxide layer and the substrate, resulting in volume charge buildup that can shift transistor threshold voltages. This mechanism is accelerated by low temperatures. Field accelerates electrons in channel (often observed in HEMTs). When Ee > Eg, impact ionization occurs, creating e–h pairs. Holes flow to the device source, overcome ΔEv, collected by gate. This leads to a negative gate component which may dominate at high VDS. The shape of the IG-VGS curves may identify impact ionization. Manifested by VT shift, VB ↑, gm, and ft ↓, power slump

BIR :

Built-in reliability. A phrase used in the Si industry (1900–1995 timeframe) where there was an emphasis on process control, in-line screening, and wafer level reliability (WLR) testing