This chapter discusses some of the architectural issues involved in implanting power gating designs. In particular, it addresses the issues of partitioning, hierarchy, and multiple power-gated domains.
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© 2007 Synopsys, Inc. & ARM Limited
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(2007). Architectural Issues for Power Gating. In: Low Power Methodology Manual. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-71819-4_6
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DOI: https://doi.org/10.1007/978-0-387-71819-4_6
Publisher Name: Springer, Boston, MA
Print ISBN: 978-0-387-71818-7
Online ISBN: 978-0-387-71819-4
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