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References

  1. Y. Tsividis and K. Suyama, “MOSFET modeling for analog circuit CAD: problems and prospects,” CICC Tech. Dig., pp. 14.1.1–14.1.6, 1993.

    Google Scholar 

  2. Compact Model Workshop, Sunnyvale, CA, Aug., 1995.

    Google Scholar 

  3. R. Kielkowski, inside Spice, McGraw-Hill, Inc. New York, 1994.

    Google Scholar 

  4. N. D. Arora et al., “PCIM: a physically based continuous short-channel IGFET model for circuit simulation,” IEEE Trans. Electron Devices, vol. ED-41, pp. 988–997, 1994.

    Google Scholar 

  5. R. M. D. A. Velghe et al., “Compact MOS modeling for analog circuit simulation”, IEDM Tech. Dig., pp. 485–488, Dec. 1993.

    Google Scholar 

  6. C. C. Enz et al., “An analytical MOS transistor model valid in all regions of operation and dedicated to low voltage and low-current applications”, J. Analog Integrated Circuit and Signal Processing, Vol. 8, pp. 83–114, 1995.

    Google Scholar 

  7. M. Shur, T. A. Fjeldly, T. Ytterdal, and K. Lee, “An unified MOSFET model,” Solid-State Electronics, 35, pp. 1795–1802, 1992.

    Article  Google Scholar 

  8. Y. Cheng et al., “A unified BSIM I-V mode for circuit simulation”, 1995 International semiconductor devices research symposium, Charlottesville, pp. 603–606, 1995.

    Google Scholar 

  9. Y. Cheng et al., “An investigation on the robustness, accuracy and simulation performance of a physics-based deep-submicrometer BSIM model for analog/digital circuit simulation”, CICC Tech. Dig, pp. 321–324, May 1996.

    Google Scholar 

  10. Y. Cheng et al., “A physical and scalable BSIM3v3 I-V model for analog/digital circuit simulation”, IEEE Trans. Electron Devices, vol. 44, pp. 277–287, Feb. 1997.

    Google Scholar 

  11. Y. Cheng et al., BSIM3 version 3.0 User’s Manual, University of California, Berkeley, 1995.

    Google Scholar 

  12. Y. Cheng et al., BSIM3 version 3.1 User’s Manual, University of California, Berkeley, Memorandum No. UCB/ERL M97/2, 1997.

    Google Scholar 

  13. T. L. Quarles, Adding device to SPICE3, University of California, Berkeley, Memorandum No. UCB/ERL M89/45, 1989.

    Google Scholar 

  14. http://www-device.eecs.berkeley.edu/~bsim3.

  15. Y. Cheng et al., Compact Model Workshop, Burlington, Vermont, Aug., 1996

    Google Scholar 

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© 2002 Kluwer Academic Publishers

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(2002). BSIM3v3 Model Implementation. In: Mosfet Modeling & BSIM3 User’s Guide. Springer, Boston, MA. https://doi.org/10.1007/0-306-47050-0_11

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  • DOI: https://doi.org/10.1007/0-306-47050-0_11

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-0-7923-8575-2

  • Online ISBN: 978-0-306-47050-9

  • eBook Packages: Springer Book Archive

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