Abstract
This paper presents a description of an architecture of an EIT hardware for research. Both, hardware and software for capturing and processing of the EIT signals are addressed. The system is divided in modules with defined requirements and connections, therefore, different implementations are possible. Details of an implementation conceived to validate the architecture with respect to processing speed is also described.
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© 2016 Springer Science+Business Media Singapore
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Lima, R.G., Luis dos Santos, A., de Camargo, E.D.L.B., Silva de Moura, F., Santos, T.B.R. (2016). Signal Processing Architecture for Electrical Tomography Impedance. In: Simini, F., Bertemes-Filho, P. (eds) II Latin American Conference on Bioimpedance. IFMBE Proceedings, vol 54. Springer, Singapore. https://doi.org/10.1007/978-981-287-928-8_17
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DOI: https://doi.org/10.1007/978-981-287-928-8_17
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Publisher Name: Springer, Singapore
Print ISBN: 978-981-287-926-4
Online ISBN: 978-981-287-928-8
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