Abstract
Most of dual-rail CMOS circuits are loosely based around differential cascade voltage logic switch. DCVSL provides dual-rail logic gates that have latching characteristics built into circuits itself. In CVSL logic output results are held until inputs induce a change, so that there is no loss of data, thereby saving energy and power. In today’s digital application low power has become a key factor in high-speed computations. The proposed work gives an insight into the working of CVSL and the proposed method, showing a reduced number of gates, and thereby reducing area and power constraints. In this paper, exclusive detailed use of pass gate logic structure to put back the nMOS logic structure in conventional DCVSL circuit along with the implementation of adders are provided. The proposed circuit designs and results are compared and implemented using a cadence software tool and for quantum circuits QCAD tools are used. The study shows the optimization in case of power, area and speed achieved in comparison with conventional circuits.
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Kavitha, S.S., Kaulgud, N. (2021). High-Performance Digital Logic Circuit Realization Using Differential Cascode Voltage Switch Logic (DCVSL). In: Suma, V., Bouhmala, N., Wang, H. (eds) Evolutionary Computing and Mobile Sustainable Networks. Lecture Notes on Data Engineering and Communications Technologies, vol 53. Springer, Singapore. https://doi.org/10.1007/978-981-15-5258-8_17
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DOI: https://doi.org/10.1007/978-981-15-5258-8_17
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