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Impact of Internal Capacitance and Resistance to the Noise Parameter Performance

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9th International Conference on Robotic, Vision, Signal Processing and Power Applications

Abstract

This paper reports preliminary investigation of internal resistance and capacitance influence to the characterized noise parameter performance. Device Under Test (DUT) for this project is fabricated using 0.13 \(\upmu \)m process technology. The observation is performed by looking directly at the measurement results of scattering parameter and noise parameter. All uncertainties related to the measurement have been removed by the means of calibration and deembedding. Data for the internal resistance and capacitance are extracted from the scattering parameter measurement. For comparison, the measurements were conducted at two sets of gate voltage (Vg) biasing, assuming noise levels are proportional to the amount of voltage stimulated. As for the result, it is found that the lower internal resistances will result in lower R\(_n\) and NFmin.

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Acknowledgments

The authors would like to thank the Universiti Sains Malaysia for the financial support to this work under Research University Grant No. 1001/PELECT/814249 and Silterra Malaysia for the fabrication support. Partial support from CREST Grant No. 304/PELECT/6050262/C121 is also gratefully acknowledged.

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Correspondence to S. Korakkottil Kunhi Mohd or Norlaili Mohd Noh .

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Mohd, S.K.K. et al. (2017). Impact of Internal Capacitance and Resistance to the Noise Parameter Performance. In: Ibrahim, H., Iqbal, S., Teoh, S., Mustaffa, M. (eds) 9th International Conference on Robotic, Vision, Signal Processing and Power Applications. Lecture Notes in Electrical Engineering, vol 398. Springer, Singapore. https://doi.org/10.1007/978-981-10-1721-6_8

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  • DOI: https://doi.org/10.1007/978-981-10-1721-6_8

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  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-10-1719-3

  • Online ISBN: 978-981-10-1721-6

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