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Introduction to On-Chip Interconnects and Modeling

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Crosstalk in Modern On-Chip Interconnects

Part of the book series: SpringerBriefs in Applied Sciences and Technology ((BRIEFSAPPLSCIENCES))

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Abstract

This chapter briefs about the challenges associated with the modeling of on-chip interconnects in nanoscale technology. Copper had been used as an on-chip interconnect material for a long time. However, as device dimensions are scale down the reliability decreases due to electromigration induced problems. Therefore, researchers are forced to find an alternative solution for future high-speed global VLSI interconnects. This chapter introduces the evolution of graphene interconnect materials and the challenges associated with them. This chapter also introduces the FDTD technique for the modeling of on-chip interconnects.

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Authors and Affiliations

  1. Department of Electronics and Communication Engineering, Indian Institute of Technology Roorkee, Roorkee, Uttarakhand, India

    Brajesh Kumar Kaushik, V. Ramesh Kumar & Amalendu Patnaik

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  1. Brajesh Kumar Kaushik
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  2. V. Ramesh Kumar
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  3. Amalendu Patnaik
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Correspondence to Brajesh Kumar Kaushik .

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Kaushik, B.K., Kumar, V.R., Patnaik, A. (2016). Introduction to On-Chip Interconnects and Modeling. In: Crosstalk in Modern On-Chip Interconnects. SpringerBriefs in Applied Sciences and Technology. Springer, Singapore. https://doi.org/10.1007/978-981-10-0800-9_1

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  • DOI: https://doi.org/10.1007/978-981-10-0800-9_1

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  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-10-0799-6

  • Online ISBN: 978-981-10-0800-9

  • eBook Packages: EngineeringEngineering (R0)

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