Abstract
SOCs are complex density ASICs and need to be validated using the FPGAs. In the present scenario there is more demand for the FPGA prototyping to realize the ASICs. Single or multiple FPGA can be used to prototype the desired SOC functionality. This chapter focuses on the discussion on the SOC components, challenges, and the SOC design flow. Even the individual key SOC block coding is discussed in this chapter.
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© 2016 Springer India
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Taraate, V. (2016). System on Chip (SOC) Design. In: Digital Logic Design Using Verilog. Springer, New Delhi. https://doi.org/10.1007/978-81-322-2791-5_15
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DOI: https://doi.org/10.1007/978-81-322-2791-5_15
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Publisher Name: Springer, New Delhi
Print ISBN: 978-81-322-2789-2
Online ISBN: 978-81-322-2791-5
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