Self-Aligned Growth of Microstructures

Abstract

Integrated circuit complexity has progressed from small-scale integration (SSI) in the early 60’s, to medium-scale integration (MSI) in the late 60’s, to large-scale integration (LSI) in the 70’s, and finally to very large-scale integration (VLSI). For ultra large-scale integration (ULSI), new technological processes and materials are needed to reduce device dimensions (typically submicron channel length) and to increase the number of components per chip (10⁶–10⁸). Device miniaturization can result in reduced unit cost per function and in improved device performance. Some basic requirements for microminiaturization of devices should be met to ensure performance and reliability of integrated circuits. The disparity between the mask layout dimensions and the final device geometry caused by the transfer of patterns should be minimized. The materials in device structures should be defect free. A planar surface topology is highly desirable for fine-line lithography. The scaled-down structures should maintain good device characteristics. The number of technological steps such as oxidation, diffusion, masking, photolithography, etching and deposition should be reduced. Consequently, methods for deposition or growth of materials in selected areas on thin film structures defined by optical lithography or by electron beam delineation techniques have become increasingly attractive in the production of micron-size devices.