Abstract
As multicore machines become pervasive, an ever growing number of programmers face the challenge of building highly parallel applications that take full advantage of modern parallel hardware architectures. Software Transactional Memory (STM) [3] is one promising abstraction to simplify this task because when using an STM programmers may ignore low-level synchronization details and simply specify which operations must execute atomically inside transactions. It is then the STM’s responsibility to preserve the program’s semantics, while maintaining as much parallelism and concurrency as possible.
This work was supported by FCT (INESC-ID multiannual funding) through the PIDDAC Program funds and by the RuLAM project (PTDC/EIA-EIA/108240/2008).
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Rito, H., Cachopo, J. (2013). FlashbackSTM: Improving STM Performance by Remembering the Past. In: Kasahara, H., Kimura, K. (eds) Languages and Compilers for Parallel Computing. LCPC 2012. Lecture Notes in Computer Science, vol 7760. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-37658-0_19
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