Abstract
Managing and controlling interference conditions in multi-threaded programs has been an issue of worry for application developers for a long time. Typically, when write events from two concurrent threads to the same shared variable are not properly protected, an occurrence of the interference bug pattern could be exposed. We propose a mathematical formulation and its resolution to maximize the possibility of exposing occurrences of the interference bug pattern. We formulate and solve the issue as an optimization problem that gives us (1) the optimal position to inject a delay in the execution flow of a thread and (2) the optimal duration for this delay to align at least two different write events in a multi-threaded program. To run the injected threads and calculate the thread execution times for validating the results, we use a virtual platform modelling a perfectly parallel system. All the effects due to the operating system’s scheduler or the latencies of hardware components are reduced to zero, exposing only the interactions between threads. To the best of our knowledge, no previous work has formalized the alignment of memory access events to expose occurrences of the interference bug pattern. We use three different algorithms (random, stochastic hill climbing, and simulated annealing) to solve the optimization problem and compare their performance. We carry out experiments on four small synthetic programs and three real-world applications with varying numbers of threads and read/write executions. Our results show that the possibility of exposing interference bug pattern can be significantly enhanced, and that metaheuristics (hill climbing and simulated annealing) provide much better results than a random algorithm.
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References
Artho, C., Havelund, K., Biere, A., Biere, A.: High-level data races. Journal on Software Testing, Verification & Reliability, STVR (2003)
Beltrame, G., Fossati, L., Sciuto, D.: ReSP: a nonintrusive transaction-level reflective MPSoC simulation platform for design space exploration. In: Computer-Aided Design of Integrated Circuits and Systems, pp. 28–40 (2009)
Ben-Asher, Y., Farchi, E., Eytani, Y.: Heuristics for finding concurrent bugs. In: Proceedings of the 17th International Symposium on Parallel and Distributed Processing, p. 288.1(2003)
Bradbury, J.S., Cordy, J.R., Dingel, J.: Mutation operators for concurrent java (j2se 5.0) 1
Briand, L.C., Labiche, Y., Shousha, M.: Stress Testing Real-Time Systems with Genetic Algorithms. In: Proceedings of the 2005 Conference on Genetic and Evolutionary Computation (GECCO 2005), pp. 1021–1028 (2005)
Briand, L.C., Labiche, Y., Shousha, M.: Using Genetic Algorithms for Early Schedulability Analysis and Stress Testing in Real-Time Systems. Genetic Programming and Evolvable Machines 7, 145–170 (2006)
Carver, R.H., Tai, K.C.: Replay and testing for concurrent programs. IEEE Softw. 8, 66–74 (1991)
Drake, D.G.: JavaWorld.com: A quick tutorial on how to implement threads in java (1996), http://www.javaworld.com/javaworld/jw-04-1996/jw-04-threads.html
Edelstein, O., Farchi, E., Goldin, E., Nir, Y., Ratsaby, G., Ur, S.: Framework for testing multi-threaded java programs. Concurrency and Computation: Practice and Experience 15(3-5), 485–499 (2003)
Eytani, Y., Ur, S.: Compiling a benchmark of documented multi-threaded bugs. In: Parallel and Distributed Processing Symposium, International, vol. 17, p. 266a (2004)
Farchi, E., Nir, Y., Ur, S.: Concurrent bug patterns and how to test them. In: Proceedings of the 17th International Symposium on Parallel and Distributed Processing. p. 286.2 (2003)
Flanagan, C., Freund, S.N.: Atomizer: A dynamic atomicity checker for multithreaded programs. Scientific Computer Program 71(2), 89–109 (2008)
Godefroid, P.: Model checking for programming languages using verisoft. In: Proceedings of the 24th ACM Symposium on Principles of Programming Languages, pp. 174–186 (1997)
Hovemeyer, D., Pugh, W.: Finding bugs is easy. In: ACM SIGPLAN Notices, pp. 132–136 (2004)
Hwang, G.H., Chung Tai, K., Lu Huang, T.: Reachability testing: An approach to testing concurrent software. International Journal of Software Engineering and Knowledge Engineering 5, 493–510 (1995)
Joshi, P., Naik, M., Seo Park, C., Sen, K.: Calfuzzer: An extensible active testing framework for concurrent programs
Lei, Y., Carver, R.H.: Reachability testing of concurrent programs. IEEE Trans. Softw. Eng. 32, 382–403 (2006)
Long, B., Strooper, P., Wildman, L.: A method for verifying concurrent java components based on an analysis of concurrency failures: Research articles. Concurr. Comput.: Pract. Exper. 19, 281–294 (2007)
Metropolis, N., Rosenbluth, A., Rosenbluth, M., Teller, A., Teller, E.: Equation of state calculations by fast computing machines. Journal of Chemical Physics 21, 1087–1092 (1953)
Musuvathi, M., Qadeer, S., Ball, T.: Chess: A systematic testing tool for concurrent software (2007)
Park, A.: Multithreaded programming (pthreads tutorial) (1999), http://randu.org/tutorials/threads/
Park, S., Lu, S., Zhou, Y.: Ctrigger: exposing atomicity violation bugs from their hiding places. SIGPLAN Not. 44, 25–36 (2009)
Software Quality Research Group, Ontario Institute of Technology: Concurrency anti-pattern catalog for java (2010), http://faculty.uoit.ca/bradbury/concurr-catalog/
Tripakis, S., Stergiou, C., Lublinerman, R.: Checking non-interference in spmd programs. In: 2nd USENIX Workshop on Hot Topics in Parallelism (HotPar 2010), pp. 1–6 (June 2010)
Wattenberg, M., Juels, A.: Stochastic hillclimbing as a baseline method for evaluating genetic algorithms. In: Proceedings of the 1995 Conference, vol. 8, p. 430. Kaufmann (1996)
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Bhattacharya, N. et al. (2012). Optimizing Threads Schedule Alignments to Expose the Interference Bug Pattern. In: Fraser, G., Teixeira de Souza, J. (eds) Search Based Software Engineering. SSBSE 2012. Lecture Notes in Computer Science, vol 7515. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-33119-0_8
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DOI: https://doi.org/10.1007/978-3-642-33119-0_8
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