Abstract
Direct Digital Synthesis (DDS) systems generate fine frequency resolution signals over a broad spectrum that are used in a wide variety of applications such as multi-mode RF, communications, measurements and test. A high performance DDS band-pass Digital to Analog Converter (DAC) architecture and implementation is presented that delivers high spectral purity over a narrow-band response. The low power D/A Converter is portable to standard CMOS processes and designed to achieve over 100dB narrow-band SFDR performance using Sigma-Delta (∑ Δ) modulation and multi-bit current steering techniques. A 3rd order digital ∑ Δ modulator is combined with a 4th order digital Dynamic Element Matching (DEM) block to shape the noise while calibrating for process mismatch variations. A low silicon area output stage is used to deliver a high performance specification.
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Mullane, B., O’Brien, V. (2012). A 100dB SFDR 0.5V pk-pk Band-Pass DAC Implemented on a Low Voltage CMOS Process. In: Mir, S., Tsui, CY., Reis, R., Choy, O.C.S. (eds) VLSI-SoC: Advanced Research for Systems on Chip. VLSI-SoC 2011. IFIP Advances in Information and Communication Technology, vol 379. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-32770-4_9
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DOI: https://doi.org/10.1007/978-3-642-32770-4_9
Publisher Name: Springer, Berlin, Heidelberg
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