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Arithmetic Algorithms for Ternary Number System

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Progress in VLSI Design and Test

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 7373))

Abstract

The use of multi-valued logic in VLSI circuits can reduce the chip area significantly. Moreover, there are several additional advantages of using multi-valued logic in VLSI over the conventional Binary logic, such as energy efficiency, cost-effectiveness and so on. It has been shown that Base-3 number system is nearly optimal for computation. In this paper we have studied some existing logical operation on ternary number system. We have also discussed some of the existing arithmetic operations using ternary number system. Some new algorithms for arithmetic operations have also been proposed, and shown to be quite efficient in time complexity.

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References

  1. Hayes, B.: Third Base. American scientist 89(6), 490–494 (2001)

    MathSciNet  Google Scholar 

  2. Knuth, D.E.: The Art of Computer programming, 3rd edn., vol. 2. Pearson Education

    Google Scholar 

  3. Sherwani, N.A.: Algorithms for VLSI Physical Design Automation

    Google Scholar 

  4. Srivastava, A., Venkatapathy, K.: Design and implementation of a low power ternary full adder. VLSI Design 4(1), 75–81 (1996)

    Article  Google Scholar 

  5. Sathish Kumar, A., Swetha Priya, A.: The Minimization of Ternary Combinational Circuits-A Survey. International Journal of Engineering and Technology 2(8), 3576–3589 (2010)

    Google Scholar 

  6. Dhande, A.P., Ingole, V.T.: Design and Implementation of 2-Bit ternary ALU Slice. In: 3rd International Conference SETIT, Tunisia (2005)

    Google Scholar 

  7. Balla, P.C., Antoniou, A.: Low Power dissipation of MOS Ternary logic Family. IEEE Journal of Solid State Circuits Sc-19(5) (1994)

    Google Scholar 

  8. Lin, S., Kim, Y.-B., Lombardi, F.: CNTFET Based Design of Ternary Logic Gates and Arithmetic Circuits. IEEE Transactions of Nanotechnology 2(11) (2011)

    Google Scholar 

  9. Roy, K., Prasad, S.C.: Low Power CMOS VLSI Circuit Design. Wiley, India (2011)

    Google Scholar 

  10. Felicijan, T., Furber, S.B.: An Asynchronous Ternary Logic System. IEEE Transaction on Very Large Scale Intregation System 11(6) (2003)

    Google Scholar 

  11. Vasundara Patel, K.S., Gurumurthy, K.S.: Multi-valued Logic Addition and Multiplication in Galois Field. In: IEEE International Conference on Advances in Computing, Control and Telecommunication Technologies (2009)

    Google Scholar 

  12. Das, S., Sain, J.P., Dasgupta, P., Sensarma, S.: Algorithms for Ternary Number System. In: 2nd International Conference on Computer, Communication, Control and Information Technology, February 25-26. Elsevier Pub., India (2012)

    Google Scholar 

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© 2012 Springer-Verlag Berlin Heidelberg

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Das, S., Dasgupta, P.S., Sensarma, S. (2012). Arithmetic Algorithms for Ternary Number System. In: Rahaman, H., Chattopadhyay, S., Chattopadhyay, S. (eds) Progress in VLSI Design and Test. Lecture Notes in Computer Science, vol 7373. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-31494-0_13

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  • DOI: https://doi.org/10.1007/978-3-642-31494-0_13

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-31493-3

  • Online ISBN: 978-3-642-31494-0

  • eBook Packages: Computer ScienceComputer Science (R0)

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