Abstract
Floating-point representation can support a wider range of values over fixed point representation. The performance of Decimal Floating Point (DFP) operations plays an important role in financial and commercial computations. This paper uses an iterative decimal floating point multiplier using Double Digit Decimal Multiplication (DDDM) technique for decimal fixed point multiplication. It performs two digit multiplications simultaneously in one cycle. The floating point multiplier incorporates exponent processing, rounding and exception detection capabilities. The intermediate exponent, product sign, sticky bit, round digit and guard digit are determined on the fly during the accumulation of partial products. Simulation is done for 32-bit DFP data using the proposed approach. The results are compared and tabulated for area and delay with the existing design in literature.
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James, R.K., Poulose Jacob, K., Sasi, S. (2011). Decimal Floating Point Multiplier Using Double Digit Decimal Multiplication. In: Nagamalai, D., Renault, E., Dhanuskodi, M. (eds) Advances in Digital Image Processing and Information Technology. DPPR 2011. Communications in Computer and Information Science, vol 205. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-24055-3_42
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DOI: https://doi.org/10.1007/978-3-642-24055-3_42
Publisher Name: Springer, Berlin, Heidelberg
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