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Schematic Design Techniques for Power Saving in RF

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Low Power RF Circuit Design in Standard CMOS Technology

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 104))

Abstract

RF analog circuits are characterised by the use of relatively simple schemes. This is due to the fact that each component adds some kind of parasitic effects, therefore the design always follows the rule of “less is more”. For this reason, most of power saving techniques widely applied in base band or digital circuits is not suitable for high frequency applications. Chapter 5 outlines the most useful alternatives. In this chapter the general principles are presented, and many references to other works are also included. In order to help the reader to fully understand the impact of these techniques, basic simulations and comparisons are included. The practical application of these techniques is presented in subsequent chapters.

Section 5.1 starts by describing one of the design techniques that has been widely utilised within the examples presented in this book: the current reuse principle. On the other hand, section 5.2 deals with the multi-VDD principle. Sections 5.3 and 5.4 are devoted to the power gating and multiple channel length techniques respectively. Finaly, gate biasing is discussed in section 5.5.

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Authors
  1. Unai Alvarado
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  2. Guillermo Bistué
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  3. Iñigo Adín
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Alvarado, U., Bistué, G., Adín, I. (2011). Schematic Design Techniques for Power Saving in RF. In: Low Power RF Circuit Design in Standard CMOS Technology. Lecture Notes in Electrical Engineering, vol 104. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-22987-9_5

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  • DOI: https://doi.org/10.1007/978-3-642-22987-9_5

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