Abstract
An interline CCD camera is developed for remote outdoor monitor applications. This paper narrates the system requirements of the CCD camera first, presents the design considerations and a basic architecture of the analog circuit and digital controller in detail, such as the CCD peripheral circuit, preamplifier, the analog front end and its interface, the clock driver, the power supply, and the clock timing generator programmed with VHDL in FPGA. The simulation and testing results for some key modules and the whole system are analyzed.
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© 2011 Springer-Verlag Berlin Heidelberg
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Li, B., Jin, J., He, L., Liu, J., Shang, Y. (2011). Electronics Design for an Interline CCD Camera Based on FPGA. In: Wan, X. (eds) Electrical Power Systems and Computers. Lecture Notes in Electrical Engineering, vol 99. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-21747-0_58
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DOI: https://doi.org/10.1007/978-3-642-21747-0_58
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-21746-3
Online ISBN: 978-3-642-21747-0
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