A Reconfigurable Audio Beamforming Multi-Core Processor

Abstract

Over the last years, the Beamforming technique has been adopted by the audio engineering society to amplify the signal of an acoustic source, while attenuating any ambient noise. Existing software implementations provide a flexible customizing environment, however they introduce performance limitations and excessive power consumption overheads. On the other hand, hardware approaches achieve significantly better performance and lower power consumption compared to the software ones, but they lack the flexibility of a high-level versatile programming environment. To address these drawbacks, we have already proposed a minimalistic processor architecture tailoring audio Beamforming applications to configurable hardware. In this paper, we present its application as a multi-core reconfigurable Beamforming processor and describe our hardware prototype, which is mapped onto a Virtex4FX60 FPGA. Our approach combines software programming flexibility with improved hardware performance, low power consumption and compact program-executable memory footprint. Experimental results suggest that our FPGA-based processor, running at 100 MHz, can extract in real-time up to 14 acoustic sources 2.6 times faster than a 3.0 GHz Core2 Duo OpenMP-based implementation. Furthermore, it dissipates an order of magnitude less energy, compared to the general purpose processor software implementation.

This research is partially supported by Artemisia iFEST project (grant 100203), Artemisia SMECY (grant 100230), FP7 Reflect (grant 248976).