Abstract
Hybrid Nano (e.g. Nanotube and Nanowire) /CMOS circuits combine both the advantages of Nano-devices and CMOS technologies; they have thus become the most promising candidates to relax the intrinsic drawbacks of CMOS circuits beyond Moore’s law. A functional simulation model for an hybrid Nano/CMOS design is presented in this paper. It is based on Optically Gated Carbon NanoTube Field Effect Transistors (OG-CNTFET), which can be used as 2-terminal programmable resistors. Their resistance can be adjusted precisely, reproducibly and in a non-volatile way, over three orders of magnitude. These interesting behaviors of OG-CNTFET promise great potential for developing the non-volatile memory and neuromorphic adaptive computing circuits. The model is developed in Verilog-A language and implemented on Cadence Virtuoso platform with Spectre 5.1.41 simulator. Many experimental parameters are included in this model to improve the simulation accuracy.
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References
Borghetti, J., Derycke, V., Lenfant, S., Chenevier, P., Filoramo, A., Goffman, M., Vuillaume, D., Bourgoin, J.P.: Optoelectronic switch and memory devices based on polymer-functionalized carbon nanotube transistors. Advanced Materials, 2535–2541 (2006); (b) Agnus, G., et al.: Carbon Nanotube Programmable Resistors. Advanced Materials (2009) (Submitted)
Strukov, D.B., Likharev, K.K.: CMOL FPGA:a reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices. Nanotechnology 16, 888–900 (2005)
Liao, S., Maneux, C., Pouget, V., Fregonese, S., Zimmer, T.: Compact modelling of optically-Gated Carbon Nanotube Field Effect Transistor. Trends in Nanotechnology (2009)
Javey, A., Guo, J., Wang, Q., Lundstrom, M., Dai, H.J.: Ballistic carbon nanotube field-effect transistors. Nature 424, 654–657 (2003)
Dietrich, S., Angerbauer, M., Ivanov, M., Gogl, D., Hoenigschimid, H., Kund, M., Liaw, C., Markert, M., Symanczyk, R., Altimime, L., Bournat, S., Mueller, G.: A Nonvolatile 2-Mbit CBRAM Memory Core Featuring Advanced Read and Program Control. IEEE Journal of Solid-State Circuits 42, 839–845 (2007)
Verilog-A Language Reference Manual, Agilent Technologies (2004)
Lu, W., Lieber, C.M.: Nanoeletronics from the bottom up. Nature Materials 6, 841–850 (2007)
Novembre, C., Guerin, D., Lmimouni, K., Gamrat, C., Vuillaume, D.: Gold nanoparticle-pentacene memory transistors. Applied Physics Letters 92, 103–314 (2008)
Strukov, D.B., Snider, G.S., Stewart, D.R., Williams, R.S.: The missing memristor found. Nature 453, 80–83 (2008)
STMicroelectronics, Design Rules Manuel, 65nm low power (2008)
Zhao, W., Gamrat, C., Agnus, G., Derycke, V., Bourgoin, J.P.: Neural network circuit comprising nanoscale synapses and CMOS neurons, European Patent Number 09305240.5 (2009)
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© 2009 ICST Institute for Computer Science, Social Informatics and Telecommunications Engineering
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Zhao, W., Agnus, G., Derycke, V., Filoramo, A., Gamrat, C., Bourgoin, JP. (2009). Functional Model of Carbon Nanotube Programmable Resistors for Hybrid Nano/CMOS Circuit Design. In: Schmid, A., Goel, S., Wang, W., Beiu, V., Carrara, S. (eds) Nano-Net. NanoNet 2009. Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, vol 20. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-04850-0_16
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DOI: https://doi.org/10.1007/978-3-642-04850-0_16
Publisher Name: Springer, Berlin, Heidelberg
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