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Reconfigurable Multicore Server Processors for Low Power Operation

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Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS 2009)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 5657))

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Abstract

With power becoming a key design constraint, particularly in server machines, emerging architectures need to leverage reconfigurable techniques to provide an energy optimal system. The need for a single chip solution to fit all needs in a warehouse sized server is important for designers. This allows for simpler design, ease of programmability, and part reuse in all segments of the server. A reconfigurable design would allow a single chip to operate efficiently in all aspects of a server providing both single thread performance for tasks requiring it, and efficient parallel processing helping to reduce power consumption. In this paper we explore the possibility of a reconfigurable server part and discuss the benefits and open questions still surrounding these techniques.

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References

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© 2009 IFIP International Federation for Information Processing

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Dreslinski, R.G., Fick, D., Blaauw, D., Sylvester, D., Mudge, T. (2009). Reconfigurable Multicore Server Processors for Low Power Operation. In: Bertels, K., Dimopoulos, N., Silvano, C., Wong, S. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2009. Lecture Notes in Computer Science, vol 5657. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-03138-0_27

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  • DOI: https://doi.org/10.1007/978-3-642-03138-0_27

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-03137-3

  • Online ISBN: 978-3-642-03138-0

  • eBook Packages: Computer ScienceComputer Science (R0)

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