Abstract
Single instruction multiple data (SIMD) processing is an important technique for achieving high performance in applications with innate data level parallelism such as applications from the Software Defined Radio (SDR) domain. This paper investigates using the LISA 2.0 Language to facilitate the development of scalable SIMD digital signal processors (DSPs). Our work shows that limitations in LISA hinder the development of SIMD data paths; therefore, extensions to LISA that enable to generate a wide SIMD data path from a single scalar processing element have been introduced. Furthermore, generators for SIMD permutation networks with arbitrary SIMD widths have been implemented. The presented solution simplifies the development of scalable SIMD DSPs in LISA considerably.
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Westermann, P., Schröder, H. (2009). Modeling Scalable SIMD DSPs in LISA. In: Bertels, K., Dimopoulos, N., Silvano, C., Wong, S. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2009. Lecture Notes in Computer Science, vol 5657. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-03138-0_17
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DOI: https://doi.org/10.1007/978-3-642-03138-0_17
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