Abstract
A voltage controlled nano addressing circuit is proposed, which (1) improves yield and enables aggressive scaling with no requirement of precise layout design, (2) achieves precision of addressing by transistor current-to-voltage sensitivity in the circuit and applied external address voltages, and (3) is adaptive to and more robust in the presence of process variations which are expected to be prevalent in nanoelectronic designs.
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© 2009 ICST Institute for Computer Science, Social Informatics and Telecommunications Engineering
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Liu, B. (2009). A Voltage Controlled Nano Addressing Circuit. In: Cheng, M. (eds) Nano-Net. NanoNet 2008. Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, vol 3. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-02427-6_13
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DOI: https://doi.org/10.1007/978-3-642-02427-6_13
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-02426-9
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