Abstract
New insights into the general structure of partial product reduction trees are combined with the notion of clever circuits to give a novel method of writing simple but flexible and highly parameterised data-path generators.
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Sheeran, M. (2004). Generating Fast Multipliers Using Clever Circuits. In: Hu, A.J., Martin, A.K. (eds) Formal Methods in Computer-Aided Design. FMCAD 2004. Lecture Notes in Computer Science, vol 3312. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30494-4_2
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DOI: https://doi.org/10.1007/978-3-540-30494-4_2
Publisher Name: Springer, Berlin, Heidelberg
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