Abstract
This chapter presents UniServer that exploits the increased variability within CPUs and memories manufactured in advanced nanometer nodes that give rise to another type of heterogeneity; the intrinsic hardware heterogeneity which differs from the functional heterogeneity, which is discussed in the previous chapters. In particular, the aggressive miniaturization of transistors led to worsening of the static and temporal variations of transistor parameters, resulting eventually to large variations in the performance and energy efficiency of the manufactured chips. Such increased variability causes otherwise-identical nanoscale circuits to exhibit different performance or power-consumption behaviors, even though they are designed using the same processes and architectures and manufactured using the same exact production lines. The UniServer approach discussed in this chapter attempts to quantify the intrinsic variability within the CPUs and memories of commodity servers and reveal the true capabilities of each core and memory through unique automated online and offline characterization processes. The revealed capabilities and new operating points or cores and memories that may differ substantially from the ones currently adopted by manufacturers are then being exploited by an enhanced error-resilient software stack for improving the energy efficiency, while maintaining high levels of system availability. The UniServer approach introduces innovations across all layers of the hardware and system software stack; from firmware to hypervisor, up to the OpenStack resource manager targeting deployments at the emerging edge or classical cloud data centers.
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Mukhanov, L. et al. (2019). Improving the Energy Efficiency by Exceeding the Conservative Operating Limits. In: Kachris, C., Falsafi, B., Soudris, D. (eds) Hardware Accelerators in Data Centers. Springer, Cham. https://doi.org/10.1007/978-3-319-92792-3_13
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DOI: https://doi.org/10.1007/978-3-319-92792-3_13
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