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Vectorization of High-Order DG in Ateles for the NEC SX-ACE

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Sustained Simulation Performance 2017

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Abstract

In this chapter, we investigate the possibilities of deploying a high-order, modal, discontinuous Galerkin scheme on the SX-ACE. Our implementation Ateles is written in modern Fortran and requires the new sxf03 compiler from NEC. It is based on an unstructured mesh representation that necessitates indirect addressing, but allows for a large flexibility in the representation of geometries. However, the degrees of freedom within the elements are stored in a rigid, structured array. For sufficiently high-order approximations these data structures within the elements can be exploited for vectorization.

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References

  1. Hennessy, J., Patterson D.: Computer Architecture, A Quantitative Approach. 5th edn. Morgan Kaufmann, Burlington (2012)

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  2. Klimach, H., Qi, J., Roller, S.: APES on SX-ACE. In: Resch, M., Bez, W., Focht, E., Patel, N., Kobayashi, H. (eds.) Sustained Simulation Performance 2016. Springer, Heidelberg (2016)

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  3. Anand, N., Klimach, H., Roller, S.: Dealing with non-linear terms in the modal high-order discontinuous Galerkin method. In: Resch, M., Bez, W., Focht, E., Patel, N., Kobayashi, H. (eds.) Sustained Simulation Performance 2016. Springer, Heidelberg (2016)

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Acknowledgements

We would like to thank Holger Berger from NEC for his kind support, the Tohoku University and HLRS for the opportunity to use their NEC SX-ACE installation.

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Authors and Affiliations

  1. University of Siegen, Adolf-Reichwein Str. 2, 57076, Siegen, Germany

    Harald Klimach, Jiaxing Qi & Sabine Roller

  2. Höchstleistungsrechenzentrum Stuttgart, Nobelstr. 19, 70569, Stuttgart, Germany

    Stephan Walter

Authors
  1. Harald Klimach
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  2. Jiaxing Qi
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  3. Stephan Walter
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  4. Sabine Roller
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Corresponding author

Correspondence to Harald Klimach .

Editor information

Editors and Affiliations

  1. High Performance Computing Center (HLRS), University of Stuttgart, Stuttgart, Baden-Württemberg, Germany

    Michael M. Resch

  2. Europe GmbH, NEC High Performance Computing, Düsseldorf, Nordrhein-Westfalen, Germany

    Wolfgang Bez

  3. Europe GmbH, NEC High Performance Computing, Stuttgart, Germany

    Erich Focht

  4. High Performance Computing Center (HLRS), University of Stuttgart , Stuttgart, Germany

    Michael Gienger

  5. Cyberscience Center, Tohoku University , Sendai, Japan

    Hiroaki Kobayashi

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Klimach, H., Qi, J., Walter, S., Roller, S. (2017). Vectorization of High-Order DG in Ateles for the NEC SX-ACE. In: Resch, M., Bez, W., Focht, E., Gienger, M., Kobayashi, H. (eds) Sustained Simulation Performance 2017 . Springer, Cham. https://doi.org/10.1007/978-3-319-66896-3_5

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