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Manufacturing Threats

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Dependable Multicore Architectures at Nanoscale

Abstract

This chapter introduces an overview of the main reliability threats of last nanoscale generations of CMOS technology designs. In particular, the chapter focuses on sources of process variability and their impact on circuit design and their performances, but also on the runtime variability such as voltage fluctuations as well soft errors. Further to that we go over the transistor aging provoked by different wear-out physical effects such as Bias Temperature Instability (BTI), Hot Carrier Injection (HCI), Random Telegraph Noise (RTN) and Time-Dependent Dielectric Breakdown (TDDB).

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Authors and Affiliations

  1. Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany

    Saman Kiamehr & Mehdi B. Tahoori

  2. Grenoble Institute of Technology, Phelma, Grenoble Cedex, France

    Lorena Anghel

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  1. Saman Kiamehr
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Correspondence to Mehdi B. Tahoori .

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  1. Department of Electronic Engineering, University of Rome Tor Vergata, Rome, Italy

    Marco Ottavi

  2. Department of Informatics and Telecommunications, National and Kapodistrian University of Athens, Athens, Greece

    Dimitris Gizopoulos

  3. National Inter-University Consortium for Telecommunications (CNIT), Rome, Italy

    Salvatore Pontarelli

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Kiamehr, S., Tahoori, M.B., Anghel, L. (2018). Manufacturing Threats. In: Ottavi, M., Gizopoulos, D., Pontarelli, S. (eds) Dependable Multicore Architectures at Nanoscale. Springer, Cham. https://doi.org/10.1007/978-3-319-54422-9_1

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  • DOI: https://doi.org/10.1007/978-3-319-54422-9_1

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-54421-2

  • Online ISBN: 978-3-319-54422-9

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