Abstract
This chapter deals with the original methods of hardware reduction based on the transformation of object codes of Moore FSMs. Two types of basic models of Moore FSMs with OCT are described, as well as EMB-based structures corresponding to these models. The design methods are proposed for the EMB-based FSMs with transformation of states into the collections of microoperations. Next, the design methods are shown allowing the transformation of the collections of microoperations into the states. The models of FSMs with the replacement of logical conditions and OCT are discussed. The additional hardware reduction is achieved due to using the classes of pseudoequivalent states.
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Barkalov, A., Titarenko, L., Kolopienczyk, M., Mielcarek, K., Bazydlo, G. (2016). Object Codes Transformation for Moore FSMs . In: Logic Synthesis for FPGA-Based Finite State Machines. Studies in Systems, Decision and Control, vol 38. Springer, Cham. https://doi.org/10.1007/978-3-319-24202-6_4
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DOI: https://doi.org/10.1007/978-3-319-24202-6_4
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