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Background of Finite State Machines and Programmable Logic

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Logic Synthesis for FPGA-Based Finite State Machines

Part of the book series: Studies in Systems, Decision and Control ((SSDC,volume 38))

Abstract

The chapter deals with basic issues connected with finite state machines and programmable logic. The basic models of Mealy and More FSMs are presented. The basic design methods are presented for microprogram automata, microprogram control units and compositional microprogram control units. Main methods of hardware reduction are given for finite state machines implemented with field programmable logic devices.

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Authors and Affiliations

  1. Institute of Informatics and Electronics, University of Zielona Góra, Zielona Góra, Poland

    Alexander Barkalov, Larysa Titarenko, Malgorzata Kolopienczyk, Kamil Mielcarek & Grzegorz Bazydlo

Authors
  1. Alexander Barkalov
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  2. Larysa Titarenko
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  3. Malgorzata Kolopienczyk
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  4. Kamil Mielcarek
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  5. Grzegorz Bazydlo
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Correspondence to Alexander Barkalov .

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Barkalov, A., Titarenko, L., Kolopienczyk, M., Mielcarek, K., Bazydlo, G. (2016). Background of Finite State Machines and Programmable Logic. In: Logic Synthesis for FPGA-Based Finite State Machines. Studies in Systems, Decision and Control, vol 38. Springer, Cham. https://doi.org/10.1007/978-3-319-24202-6_1

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  • DOI: https://doi.org/10.1007/978-3-319-24202-6_1

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-24200-2

  • Online ISBN: 978-3-319-24202-6

  • eBook Packages: EngineeringEngineering (R0)

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