Future Challenges and Outlook for Dry Etching Technology

Abstract

The author joined the semiconductor industry in 1975. Combined with his 3 earlier years spent on semiconductor research in college and in graduate school, the author’s total involvement with semiconductors has spanned approximately 40 years. During that time, semiconductor technology has made incredible advances in terms of device scaling, density increases, and larger wafer diameters. As mentioned in Chap. 1, the device minimum feature size has been shrunk by approximately 30 % every 3 years, and the LSI device density has been increasing pretty much according to Moore’s law. In 1975, when the author first started in the semiconductor industry, a large number of discrete bipolar transistors were still in manufacturing, and 16K DRAM, based on the 5-μm process, was just about to begin. As of 2011, logic devices and memory products, with minimum feature sizes of 32–28 nm, had gone into volume production. This means that minimum feature sizes were scaled to 1/200 in 36 years. At the same time, the number of transistors on each microprocessor chip grew by approximately 100,000-fold. Furthermore, the Si wafer diameter, which used to be 75 mm in 1975, had grown to 300 mm. It is a different world today.