Abstract
This chapter reviews the etching of materials actually used in the semiconductor manufacturing process. Etching used in the semiconductor process may be categorized into (1) etching of Si, (2) etching of insulators, and (3) etching of metal line materials. In this chapter, the key technologies in each category—which are gate etching, SiO2 etching for holes, spacer etching, and etching of Al alloy stacked metal layer structures—are described in detail. The discussions delve beyond simple descriptions and include the information that will help the reader understand the key parameters for the etching process and how to control them. The chapter has been designed so that once the reader understands these etching processes, the knowledge may be applied to the etching of other materials. For example, a section on gate etching reviews the etching of the poly–Si gate, WSi2/poly–Si gate, and W/WN/poly–Si gate. Once the reader understands these completely, then a similar approach may be followed for designing an etching process for shallow trench isolation (STI) and W metal lines. Also, with gate etching, there is a strong need not only to control the etch profile, but also to minimize the pattern size nonuniformity across the wafer. A discussion on this issue includes which parameters dominate the pattern size uniformity across the wafer and how to control them.
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Nojiri, K. (2015). Dry Etching of Various Materials. In: Dry Etching Technology for Semiconductors. Springer, Cham. https://doi.org/10.1007/978-3-319-10295-5_3
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DOI: https://doi.org/10.1007/978-3-319-10295-5_3
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