Bonded Hemishell Approach to Encapsulate Microdevices in Spheroidal Packages

Abstract

Silicon-based micromachining techniques were investigated as a method of encapsulating electronics in thin-walled spheroidal shells. Various bulk isotropic etching methods were utilized to produce hemispherical cavities in silicon wafers. sulfur hexafluoride (SF₆) based plasma was determined to be a preferable alternative to wet HNA etching when performing repeatable isotropic etches in silicon. Silicon crystal orientation’s effect on etch variance and anisotropy was also investigated. HNA polishing was demonstrated as an effective method of reducing undercutting, surface roughness, and anisotropy. Image processing routines were developed and incorporated into etch analysis, improving data collection efficiency. These hemispherical silicon cavities serve as a template for thin film deposition of a hemispherical shell, or hemishell. Photoresist can be patterned over the hemishells with 3D photolithography techniques, facilitating the deposition of metal traces and bonding sites. To improve throughput, a novel closed-loop photolithography technique was developed. This technique leverages the capabilities of existing cleanroom devices to perform precise alignment and patterning. After patterning, hemishells can be aligned and bonded using modern packaging technologies, and separated from the silicon wafers using selective etch chemistries. The 0.1–1 mm³, spheroidal structures present an innovative packaging alternative for a wide variety of microdevices. Particular applications include electrostatically actuated microrobots and non-invasive ubiquitous microsensors.