Skip to main content

Simulation and Modelling for Network-on-Chip Based MPSoC

  • Conference paper
  • First Online:
Applied Reconfigurable Computing. Architectures, Tools, and Applications (ARC 2023)

Abstract

As systems that can adapt their architecture and behavior in response to their environment become increasingly valuable in modern applications, research and development in inherently adaptive embedded systems is gaining momentum. Network-on-Chip based multi-processor architectures are promising for the development of adaptive embedded systems. The aim of this PhD work is to create a comprehensive simulation platform that bridges the gap between simulation and the design of such adaptive systems on real hardware. This paper introduces our proposed platform, presents preliminary results, and highlights upcoming steps and planned future work in this research topic.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 59.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 74.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. Benini, L., Micheli, G.D.: Networks on chips: a new SoC paradigm. Computer 35(1), 70–78 (2002). https://doi.org/10.1109/2.976921

    Article  Google Scholar 

  2. Catania, V., Mineo, A., Monteleone, S., Palesi, M., Patti, D.: Noxim: an open, extensible and cycle-accurate network on chip simulator. In: 2015 IEEE 26th International Conference on Application-specific Systems, Architectures and Processors (ASAP), pp. 162–163 (2015). https://doi.org/10.1109/ASAP.2015.7245728

  3. Herdt, V., Große, D., Pieper, P., Drechsler, R.: RISC-V based virtual prototype: an extensible and configurable platform for the system-level. J. Syst. Archit. 109, 1 October 2020. https://doi.org/10.1016/j.sysarc.2020.101756

  4. Haase, J., Gros, A., Feichter, M., Göhringer, D.: Panaca: an open-source configurable network-on-chip simulation platform. In: 2022 35th SBC/SBMicro/ IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI), pp. 1–6 (2022). https://doi.org/10.1109/SBCCI55532.2022.9893260

  5. Haase, J., Ali, M., Göhringer, D.: Unlocking the potential of RISC-V heterogeneous MPSoCs: a panaca-based approach to simulation and modeling. In: Embedded Computer Systems: Architectures, Modeling, and Simulation, Springer International Publishing (2023)

    Google Scholar 

  6. Haase, J., Jaster, S., Franz, E., Göhringer, D.: Secure communication protocol for network-on-chip with authenticated encryption and recovery mechanism. In: 2022 IEEE 33rd International Conference on Application-specific Systems, Architectures and Processors (ASAP), pp. 156–160 (2022). https://doi.org/10.1109/ASAP54787.2022.00033

  7. Charaf, N., Haase, J., Kulisch, A., von Elm, C., Göhringer, D.: Rtass: a runtime adaptable and scalable system for network-on-chip-based architectures. In: 26th Euromicro Conference on Digital System Design (DSD) (2023)

    Google Scholar 

Download references

Acknowledgement

Funded by the German Research Foundation (DFG, Deutsche Forschungsgemeinschaft) as part of Germany’s Excellence Strategy - EXC 2050/1 - Project ID 390696704 - Cluster of Excellence “Centre for Tactile Internet with Human-in-the-Loop” (CeTI) of Technische Universität Dresden.

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Julian Haase .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2023 The Author(s), under exclusive license to Springer Nature Switzerland AG

About this paper

Check for updates. Verify currency and authenticity via CrossMark

Cite this paper

Haase, J., Göhringer, D. (2023). Simulation and Modelling for Network-on-Chip Based MPSoC. In: Palumbo, F., Keramidas, G., Voros, N., Diniz, P.C. (eds) Applied Reconfigurable Computing. Architectures, Tools, and Applications. ARC 2023. Lecture Notes in Computer Science, vol 14251. Springer, Cham. https://doi.org/10.1007/978-3-031-42921-7_26

Download citation

  • DOI: https://doi.org/10.1007/978-3-031-42921-7_26

  • Published:

  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-031-42920-0

  • Online ISBN: 978-3-031-42921-7

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics