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Passive Components

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Silicon Analog Components

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Abstract

Integrated components that do not amplify current or voltage signals belong to a family of devices referred to as passive components. This includes resistors, capacitors, varactors, and inductors. This chapter describes passive components that can be integrated in a CMOS technology. The design and characteristics of different types of resistors, capacitors, varactors, and spiral inductors are described, followed by simple examples of their applications in analog circuits. Passive components, in particular capacitor and resistors, occupy a substantial area of the chip (Fig. 1.12). They should be optimized by minimizing the area while maintaining the desired electrical properties.

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Author information

Authors and Affiliations

  1. PIYE, Cedar Park, TX, USA

    Badih El-Kareh

  2. Lou Hutter Consulting, Dallas, TX, USA

    Lou N. Hutter

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Problems

Problems

  1. 1.

    The VDP sheet resistance of a poly resistor is RS = 1 kΩ/□ at 27 °C. For an average TCR of 2000 ppm/°C, estimate RS at 150 °C.

  2. 2.

    Use the mobility relations in Chap. 2 to calculate the sheet resistance of a deep N-well having a Gaussian profile with a peak concentration of 5 × 1017 cm−3 at a depth of 1.0 μm from the surface and a standard distribution of 0.3 μm. Find the sheet resistance and TCR for 25, 85, and 125 °C.

  3. 3.

    Consider an N-well having a Gaussian profile with a peak donor concentration of 5 × 1017 cm−3 at the silicon surface and a standard deviation (straggle) of 0.4 μm. Assume 25 °C.

    1. (a)

      Find the depth of the junction formed between N-well and a 10 Ω-cm P-type substrate.

    2. (b)

      Use the mobility relations in Chap. 2 to estimate the full well sheet resistance.

    3. (c)

      Estimate the well to substrate parasitic capacitance in fF/μm2.

    4. (d)

      Find the sheet resistance of the well region under a 0.4-μm-thick shallow-trench isolation (STI).

  4. 4.

    A polysilicon resistor of sheet resistance RS = 230 kΩ/□ at 27 °C is formed over STI of thickness 0.4 μm. The TCR is −500 ppm/K, and the VCR is −2090 ppm/K2.

    1. (a)

      Plot the ratio RS(T)/RS0 from 0 to +125 °C where RS0 is the sheet resistance at 27 °C.

    2. (b)

      Plot the ratio RS(V)/RS0 from −10 to +10 V where RS0 is the sheet resistance V = 0.

    3. (c)

      Find the average parasitic capacitance in fF/μm2 for a uniform substrate boron concentration under the STI of 1016 cm−3 and + 5 V applied across the resistor.

  5. 5.

    The figure below is a schematic of a precision analog capacitor with SiO2 as the dielectric, designed in a cross-coupled arrangement. Show that this arrangement reduces the VCC when compared to a single equivalent capacitor having the same dielectric.

    figure a
  6. 6.

    An MIM capacitor is formed with a triple ONO dielectric, consisting of 5-nm oxide, 10-nm nitride, and 10-nm oxide. Assume the dielectric constants to be 3.8 for oxide and 7.0 for nitride and

    1. (a)

      Find the equivalent oxide thickness teq and capacitance in fF/μm2.

    2. (b)

      For 5 V applied between the metal plates, calculate the fields in the oxide and nitride films.

    3. (c)

      For a maximum allowable field in the oxide of 5 × 105 V/cm, what is the maximum voltage that can be applied to the capacitor?

    4. (d)

      What would be the maximum voltage if the dielectric was pure oxide of same teq as for the ONO structure?

  7. 7.

    An accumulation-mode varactor of the type shown in Fig. 8.39 is formed between N+-polysilicon and N-well. The equivalent oxide thickness is 25 nm and the N-well concentration uniform with ND = 1017 cm−3. The gate voltage with respect to N-well is pulsed from +1 to −1 V. Assume negligible generation of electron–hole pairs, and find the tuning ratio at 25 °C. Neglect parasitic capacitances.

  8. 8.

    The minimum top metal width and space in a CMOS process are, respectively, W = 0.5 μm and S = 0.5 μm. Use the minimum dimensions to design a square-shaped inductor of L = 10 nH. Disregard proximity and skin effects.

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El-Kareh, B., Hutter, L.N. (2020). Passive Components. In: Silicon Analog Components. Springer, Cham. https://doi.org/10.1007/978-3-030-15085-3_8

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