Abstract
Microprocessors, while operating, exhibit non uniform temperature distribution and are rated by their maximum junction temperature. The thermal design and the cooling requirements of the microprocessor package govern the thermal specification of the product. Accurate evaluation of the junction temperature, T j , is important in defining the product thermal specifications. It requires a combination of modeling and experimental approaches to estimate the T j of a microprocessor product. It is an iterative process between the T j estimate and the thermal design of the product. If the estimate of T j exceeds the requirements of the specification, the thermal design and the cooling solution of the product needs to be modified. A temperature sensor within the silicon die measures the real time T j during the operation of the product. The T j measurement ensures that the product is working below the threshold limit as defined in the specification. An error in the T j estimates and the T j measurements can result in negative thermal impact of the product thereby reducing either its performance or operating life. Understanding the overall thermal management and the error analysis helps in effective temperature control of the junction temperature. This chapter describes the T j evaluation process, temperature sensing methods, the thermal management of the microprocessor, and the sensitivity analysis showing the thermal impacts.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Borkar, S., “Design challenges of technology scaling”, IEEE Micro, July – August (1999).
Borkar, S., Chien, A., “The future of microprocessors,” Communication of the ACM, vol. 54, No. 5, May (2011).
Chiu C., Solbrekken G., and Chung Y., “Thermal modeling of grease-type interface material in PPGA application,” in Proc. 13th Annu. IEEE Semiconductor Thermal Measurement and Management Symp. (SEMI-THERM), 1997, pp. 57–63 (1997).
Chiu C., Solbrekken G., and Young T., “Thermal modeling and experimental validation of thermal interface performance between non-flat surfaces,” in Proc. 7th Intersociety Conf. Thermal and Thermo-Mechanical Phenomena in Electronic Systems (ITHERM 2000), vol. 1, pp. 52–62 (2000).
Chiu C., Maveety J., and Tran Q., “Characterization of solder interfaces using laser flash metrology,” Microelectron. Reliab. vol. 42, no. 1, pp. 93–100, Jan. (2002).
Chiu C., Chandran B., Mello M., and Kelley K., “An accelerated reliability test method to predict thermal grease pump-out in flip-chip applications,” in Proc. 51st Electronic Components and Technology Conf., 2001, pp. 91–97 (2001).
Goh, T.J., Chiu, C.P., Seetharamu, K.N., Quadir, G.A., and Zainal, Z.A., “Test chip and substrate design for flip chip microelectronic package thermal measurements”, Microelectronics International, Vol. 23, Number 2, 2006, 3 – 10 (2006)
Moore, G., “Cramming more components onto integrated circuits,” Electronics, vol. 38, pp. 114–117, Apr. 19 (1965).
Prasher, R., “Surface chemistry and characteristic based model for the thermal contact resistance of fluidic interstitial thermal interface materials,’’. J. Heat transf., vol. 123, pp. 969–975 (2001).
Prasher, R., “Thermal interface materials: Historical perspective, status, and future directions”, Proceedings of the IEEE, vol. 94, No. 8, Aug (2006).
Russell A. and Chiu C., “A testing apparatus for thermal interface materials,” in Proc. 1998 Int. Symp. Microelectronics, 1998, pp. 1036–1041 (1998).
Samson, E. C., Machiroutu, S. V., Chang, J. Y., Santos, I., Hermerding, J., Dani, A., “Prasher, R., Song, D. W., “Interface material selection and a thermal management technique in second-generation platforms built on Intel Centrino Mobile Technology,” Intel Technology Journal, Vol. 9, Issue 1 (2005).
Solbrekken, G.L., Chiu, C.P., “Single point calibration method for die level temperature sensors”, IEEE Intersociety Conference on Thermal Phenomenon (1998).
Solbrekken G., Chiu C., Byers B., and Reichebbacher D., “The development of a tool to predict package level thermal interface material performance,” in Proc. 7th Intersociety Conf. Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM 2000), pp. 48–54 (2000).
Torresola J., Chiu C., Chrysler G., Grannes D., Mahajan R., and Prasher R., “Density factor approach to representing impact of die power maps on thermal management,” IEEE Trans. Adv. Packag., vol. 28, no. 4, pp. 659–664, Nov. (2005).
Yuffe, M., Knoll, E., Mehalel, M., Shor, J., Kurts, T., “A fully integrated multi-CPU, GPU and memory controller 32nm processor”, IEEE International Solid-State Circuits Conference, February 22 (2011).
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2015 Springer Science+Business Media New York
About this chapter
Cite this chapter
Jha, C.M., Sanchez, J.A. (2015). Microprocessor Temperature Sensing and Thermal Management. In: Jha, C. (eds) Thermal Sensors. Springer, New York, NY. https://doi.org/10.1007/978-1-4939-2581-0_4
Download citation
DOI: https://doi.org/10.1007/978-1-4939-2581-0_4
Published:
Publisher Name: Springer, New York, NY
Print ISBN: 978-1-4939-2580-3
Online ISBN: 978-1-4939-2581-0
eBook Packages: EngineeringEngineering (R0)