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Practical Experiences in the Design of a Wafer Scale 2-D Array

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Defect and Fault Tolerance in VLSI Systems

Abstract

The wafer scale 2D array ELSA (European Large SIMD Array) is recalled in this paper. Special attention is given to recent layout results and to experiments in the reconfiguration strategy.

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© 1990 Springer Science+Business Media New York

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Saucier, G., Patry, J.L., Boubekeur, A., Sanlaville, E. (1990). Practical Experiences in the Design of a Wafer Scale 2-D Array. In: Stapper, C.H., Jain, V.K., Saucier, G. (eds) Defect and Fault Tolerance in VLSI Systems. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-9957-6_6

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  • DOI: https://doi.org/10.1007/978-1-4757-9957-6_6

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4757-9959-0

  • Online ISBN: 978-1-4757-9957-6

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