Abstract
Minimizing the power consumption of circuits is important for a wide variety of applications, both because of the increasing levels of integration and the desire for portability. Since performance is often limited by the arithmetic components’ speed, it is also important to maximize the speed. Frequently, the compromise between these two conflicting demands of low power dissipation and high speed can be accomplished by selecting the optimum circuit architecture.
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Callaway, T.K., Swartzlander, E.E. (1996). Low Power Arithmetic Components. In: Rabaey, J.M., Pedram, M. (eds) Low Power Design Methodologies. The Springer International Series in Engineering and Computer Science, vol 336. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-2307-9_7
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DOI: https://doi.org/10.1007/978-1-4615-2307-9_7
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