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Characterization of SRAM Sense Amplifier Input Offset for Yield Prediction

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Nanometer Variation-Tolerant SRAM

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Abstract

Random variations play a critical role in determining SRAM yield because they affect both the bitcell and the read sense amplifiers (SA). In this chapter, a process control monitor for SRAM SA offset is proposed and implemented in 28nm LP CMOS technology. The monitor accurately measures SA offset from a large sample size and accounts for all the layout proximity effects. The all-digital design of the monitor makes it appropriate for low voltage testing, high speed data collection, and migration to newer technologies. Detailed measurement results are provided for two of the most commonly used sense amplifiers at different supply voltage and temperature conditions. Statistical yield estimation using the measured sense amplifier offset correlates well with measured yield for a 512Kb SRAM.

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Authors and Affiliations

  1. Qualcomm Incorporated, 5775 Morehouse Drive, San Diego, 92131, USA

    M. H. Abu-Rahma

  2. The American University in Cairo, Electronics Engineering Department, School of Sciences and Engineering, AUC Avenue, New Cairo, 11835, Egypt

    M. Anis

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  1. M. H. Abu-Rahma
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  2. M. Anis
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Correspondence to M. H. Abu-Rahma .

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Abu-Rahma, M.H., Anis, M. (2013). Characterization of SRAM Sense Amplifier Input Offset for Yield Prediction. In: Nanometer Variation-Tolerant SRAM. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-1749-1_6

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  • DOI: https://doi.org/10.1007/978-1-4614-1749-1_6

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