Regression-Based Dynamic Power Estimation for FPGAs

Abstract

Design space exploration for SoC is a two-stage problem. First, it involves finding quick and accurate estimation methodologies to obtain the design space parameters. Next comes developing algorithms to exhaustively and efficiently search the multi-objective space. The increase in number and complexity of the IPs integrated per system has exerted tremendous pressure on both the estimation as well as the algorithmic aspects. There is a need for good estimation techniques in the context of heterogeneous system design. In particular, doing detailed and accurate power estimation continues to be time consuming. Recently, a few interesting techniques have been developed for doing early estimations with reasonable accuracy. Statistical learning techniques are one of them. But they are limited both in scope and versatility.