Abstract
As was mentioned in the previous chapter, device performance in mm-Wave frequencies is deeply under the influence of layout parasitics. Apart from the urge for layout dependent models, as was pointed out before, this has another important consequence: Unlike low frequency circuit design in which the device design is absolutely in the realm of process engineers, here the circuit designer could- and should- alter the device performance by changing the device layout [1, 3]. This enables the designer to layout the device based on the performance metric which is more important in any specific application. It might be astounding in the first look how much the device layout could vary certain device parameters. f max , for instance, which is an indicator of the speed of the transistor, have been reported for a similar process, CMOS 90 nm, from 80 GHz to up to 300 GHz mainly due to differences in layout [2, 8].
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Notes
- 1.
A general condition for N-port unilateralization is presented in Chap. 5.
- 2.
Noise analysis and optimization is discussed in Chap. 4.
References
Cheon KS et al (1997) CMOS layout and bias optimization for RF IC design applications. Digest of IEEE Microwave Symposium, vol 2, pp 945–948
Guo JC, Lien WY, Hung MC et al (2003) Low-K/Cu CMOS logic based SoC technology for 10 Gb transceiver with 115 GHz fT, 80 GHz fMAX RF CMOS, high-Q MiM capacitor and spiral Cu inductor. VLSI Digest of Technical Papers, pp 39–40
Heydari B, Bohsali M, Adabi E, Niknejad AM mm-Wave Devices and Circuit blocks up to 104GHz in 90nm CMOS. IEEE J. of Solid State Circuits, vol 42 pp 2893–2903
Jin X et al (1998) An effective gate resistance model for CMOS RF and noise modeling. IEDM’98 Technical Digest, pp 961–964
Mason SJ (1954) Power gain in feedback amplifiers. Trans IRE Professional Group on Circuit Theory, vol CT-1, no 2, pp 20–25
Niknejad AM (2007) Electromagnetics for high-speed analog and digital communication circuits, 1st edn. Cambridge University Press, Cambridge
Sze SM (1990) High speed semiconductor devices. Wiley, New York
Tiemeijer LF et al (2004) Record RF performance of standard 90 nm CMOS technology. IEDM Technical Digest, pp 441–444
Tsividis Y (2003) Operation and modeling of the MOS transistor, 2nd edn. Oxford University Press, Oxford
Ytterdal T, Cheng Y, Fjeldly TA (2003) Device modeling for analog and RF CMOS circuit design, 1st edn. Wiley, New York
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
Copyright information
© 2011 Springer Science+Business Media, LLC
About this chapter
Cite this chapter
Gharavi, S., Heydari, B. (2011). mm-Wave Device Optimization. In: Ultra High-Speed CMOS Circuits. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-0305-0_3
Download citation
DOI: https://doi.org/10.1007/978-1-4614-0305-0_3
Published:
Publisher Name: Springer, New York, NY
Print ISBN: 978-1-4614-0304-3
Online ISBN: 978-1-4614-0305-0
eBook Packages: EngineeringEngineering (R0)