MHz-rate Multi-Antenna Decoders: Flexible Sphere Decoder Chip Examples

Marković, Dejan; Brodersen, Robert W.; Yang, Chia-Hsiang

doi:10.1007/978-1-4419-9660-2_15

Dejan Marković³,
Robert W. Brodersen⁴ &
Chia-Hsiang Yang⁵

Part of the book series: Electrical Engineering Essentials ((EEE))

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Abstract

This chapter discusses design techniques for dealing with design flexibility, in addition to complexity that was discussed in the previous chapter. Design techniques for managing adjustable number or antennas, modulations, number of sub-carriers and search algorithms will be presented. Multi-core architecture, based on scalable processing element will be described. At the end, flexibility for multi-band operation will be discussed, with emphasis on flexible FFT that operates over many signal bands. Area and energy cost of the added flexibility will be analyzed.

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References

Yang C-H, Marković D (2008) "A Multi-Core Sphere Decoder VLSI Architecture for MIMO Communications," in Proc. IEEE Global Communications Conf, Dec, pp 3297–3301
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Authors and Affiliations

Electrical Engineering Department, University of California, Los Angeles, Los Angeles, CA, 90095, USA
Dejan Marković (Associate Professor)
Berkeley Wireless Research Center, University of California, Berkeley, Berkeley, CA, 94704, USA
Robert W. Brodersen (Professor Emeritus)
National Chiao Tung University, Taiwan, Hsinchu, Republic of China
Chia-Hsiang Yang

Authors

Dejan Marković
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Robert W. Brodersen
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Chia-Hsiang Yang
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Marković, D., Brodersen, R.W., Yang, CH. (2012). MHz-rate Multi-Antenna Decoders: Flexible Sphere Decoder Chip Examples. In: DSP Architecture Design Essentials. Electrical Engineering Essentials. Springer, Boston, MA. https://doi.org/10.1007/978-1-4419-9660-2_15

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DOI: https://doi.org/10.1007/978-1-4419-9660-2_15
Published: 07 May 2012
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-9659-6
Online ISBN: 978-1-4419-9660-2
eBook Packages: EngineeringEngineering (R0)

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