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Abstract

It is convenient at this point to recall the virtual design loop concept introduced in Chap. 1, which aids the development process of future power management technologies. Throughout the previous chapters, this idea has been realized with the use of dedicated device and circuit models that, in combination with a series of optimization guidelines, represent the cornerstones of the adopted analysis and development methodology.

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Notes

  1. 1.

    The specific ON resistance of Trench4 is 30 mΩ mm2 at T j = 25°C.

  2. 2.

    See Table 6.2 for comparison to existing technologies and test conditions for relative charge values.

References

  1. Intel® (2009) Voltage regulator-down (VRD) 11.1, processor power delivery design guidelines, Document number: 322171-001, Sept 2009

    Google Scholar 

  2. N-channel TrenchMOS logic level FET PH3330L, Trench4 technology NXP Semiconductors, Feb 2006

    Google Scholar 

  3. Peake ST, Rutter P, Hodgskiss S, Gadja M, Irwin N ( 2008) A fully realized “field balanced” trenchMOS technology. In: Proceedings of the 20th international symposium on power semiconductor devices & ICs, Orlando, 18–22 May 2008, pp 28–31

    Google Scholar 

  4. N-channel TrenchMOS logic level FET PSMN1R7-30YL, Trench6 technology NXP, Sept 2008

    Google Scholar 

  5. Goarin P, Koops GEJ, van Dalen R, Le Cam C, Saby J (2007) Split-gate resurf stepped oxide (RSO) MOSFETs for 25V applications with record low gate-to-drain charge. In: Proceedings of the 19th international symposium on power semiconductor devices & ICs, Jeju Island, 27–31 May 2007, pp 61–64

    Google Scholar 

  6. N-channel PowerTrench® (2009) MOSFET FDMS7650, Fairchild Semiconductors, Aug 2009

    Google Scholar 

  7. Rutter P, Peak ST (2010) Low voltage TrenchMOS combining low specific R DSon and Q G FOM. In: Proceedings of the 22nd international symposium on power semiconductor devices and ICs, ISPSD, Hiroshima, 6–10 June 2010, pp 325–328

    Google Scholar 

  8. http://www.irf.com/product-info/ganpowir/. Accessed 12 Oct 2010

  9. Briere MA (2009) GaN-based power device platform. In: Power systems design north America, Jan 2009, http://www.powersystemsdesign.com

  10. Briere MA (2008) GaN based power devices: cost-effective revolutionary performance. Power Electron Europe 7:29–31

    Google Scholar 

  11. Briere MA (2008) High frequency GaN-based power conversion stages. In: Invited talk at the first international workshop on power supply on chip, Cork, Ireland, 22–24 Sept 2008

    Google Scholar 

  12. Chin R, Chia TS, Wan K, Houng T, Peels W (2008) Development of flex-based embedded actives packages. In: Electronic circuit world convention, vol 11, Shanghai, March 2008

    Google Scholar 

  13. Peels W, Heyes D, Kengen M (2009) Embedded die technology, next generation packaging for discrete semiconductors. In: SEMICON Europa, Dresden, Germany, Oct 2009

    Google Scholar 

  14. Bencuya I, Estacio MCB, Sapp SP, Tangpuz CN, Baje GS, Maligro RD (2002) Low resistance package for semiconductor devices. US patent US6423623B1, 23 July 2002

    Google Scholar 

  15. Coilcraft. http://www.coilcraft.com/smpower.cfm. Accessed 25 Oct 2010

  16. Ngo KDT, Kuo MH (1988) Effects of air gaps on winding loss in high-frequency planar magnetics. In: 19th power electronics specialists conference, PESC 1988, vol 2, Kyoto, Japan, 11–14 Apr (1988), pp 1112–1119

    Google Scholar 

  17. Severns R (1992) Additional losses in high frequency magnetic due to non ideal field distributions. In: 7th applied power electronics conference and exposition, APEC 1992, Boston, pp 333–338

    Google Scholar 

  18. Kutkut NH, Divan DM (1998) Optimal air-gap design in high-frequency foil windings. IEEE Trans Power Electron 13(5):942–949

    Article  Google Scholar 

  19. Chew WM, Evans PD (1991) High frequency inductor design concepts. In: 22nd power electronics specialists conference, Cambridge, 24–27 June 1991, pp 673–678

    Google Scholar 

  20. Hu J, Sullivan CR (1998) Optimization of shapes for round wire, high frequency gapped inductor windings. In: IEEE industry applications society annual meeting, Oct 1998, pp 907–911

    Google Scholar 

  21. Intel® (2009) Intel Core i7-900 desktop processor extreme edition series and Intel Core i7-900 desktop processor series and LGA1366 Socket, thermal and mechanical design guide. Document number: 320837-003, Oct 2009

    Google Scholar 

  22. NXP Semiconductors (2006) DC-to-DC converter powertrain. Datasheet PIP212-12M, 2006. www.nxp.com

  23. Coilcraft, SMT power inductors – SLC7649 series. Document 481-1. www.coilcraft.com

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López, T., Elferich, R., Alarcón, E. (2011). Roadmap Targets. In: Voltage Regulators for Next Generation Microprocessors. Springer, New York, NY. https://doi.org/10.1007/978-1-4419-7560-7_6

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  • DOI: https://doi.org/10.1007/978-1-4419-7560-7_6

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