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Model Level 2: Power Loss Model

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Voltage Regulators for Next Generation Microprocessors

Abstract

The proposed PLA model of Chap. 2 aids the derivation of power loss expressions that constitute model level 2 (see Sect. 1.4). While some of these equations have already been presented in the previous chapter, new ones will be derived in this chapter by way of simplifying and combining several of the analytical equations of the PLA model.

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Notes

  1. 1.

    Other second order effects such as skin or proximity effects leading to an increase of the total MOSFET’s ON resistance are not taken into account in neither of the two models in this particular case.

References

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  2. López T, Sauerlaender G, Duerbaum T, Tolle T (2003) A detailed analysis of a resonant gate driver for frequency control applications. In European power electronics conference, 2003, http://www.epe-association.org/epe/index.php

  3. López T, Sauerlaender G, Duerbaum T, Tolle T (2003) A detailed analysis of a resonant gate driver for PWM applications. In IEEE applied power electronics conference, APEC, Aachen, Germany, 9–13 Feb 2003, vol 2, pp 873–878

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  4. PIP212-12M DC-to-DC converter powertrain online documentation, www.nxp.com. Accessed Oct 2006

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Correspondence to Toni López .

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López, T., Elferich, R., Alarcón, E. (2011). Model Level 2: Power Loss Model. In: Voltage Regulators for Next Generation Microprocessors. Springer, New York, NY. https://doi.org/10.1007/978-1-4419-7560-7_4

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  • DOI: https://doi.org/10.1007/978-1-4419-7560-7_4

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  • Publisher Name: Springer, New York, NY

  • Print ISBN: 978-1-4419-7559-1

  • Online ISBN: 978-1-4419-7560-7

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